As is known in the art, the demand for ever smaller and more capable electronic devices drives power electronics research. Greater integration, a flood of portable devices, and continued trends in computation and communication are placing increasing demands on the size, efficiency, and control bandwidth of the power conversion circuitry.
Passive energy storage components (e.g. inductors and capacitors) often comprise the majority of the size of dc-dc power converters. In addition, the energy stored in these elements places an underlying limit on the speed with which a converter can respond to changing load conditions. A direct means for improving size and control bandwidth of dc-dc power converters is to increase the switching frequency. Higher switching frequencies reduce the required energy storage enabling the use of smaller-valued—and physically smaller—passive components. The desire to achieve high switching frequencies while maintaining high efficiency has led to the development of a variety of “soft switching” power converter circuits that reduce the losses associated with switching semiconductor devices on and off. These dc-dc converter circuits typically have an “inverter” device or circuit that generates an intermediate waveform with an ac component and a “rectifier” device or circuit that synthesizes the desired dc output. Circuit operation is structured as to mitigate losses during the switching transition of the inverter and/or rectifier devices (e.g., through resonant action).
Many known soft-switched dc-dc converters are based on the class-E inverter, often used in RF amplifier applications. The class-E inverter uses zero-voltage switching (with zero dv/dt at switch turn-on) to eliminate losses that normally occur with hard switching, due to switch capacitance and the overlap of voltage and current in the switch (V-I overlap). This circuit can be adapted to power conversion but only operates efficiently over a narrow range of load and switching frequency. Additionally, regulation is difficult using conventional techniques because duty ratio control is not very effective and frequency control is only feasible over a relatively narrow range.
Existing RF converter topologies suffer from drawbacks. Power converters based on the class-E inverter have peak switch voltage stresses ranging to as much as 4.4 times the input voltage. Related single-inverter-switch resonant converter types operating under zero-voltage switching similarly impose high switch stress, typically factor of greater than or equal to three times the input dc voltage. This high stress requires a relatively high-voltage switch and can incur an efficiency penalty. Other topologies used in RF amplification, such as the class F inverter and its variants, shape waveform harmonics to reduce peak device voltage. However, practical prior art designs of these types have been operated with significant V-I overlap (i.e., not truly “switched” mode), reducing efficiency to levels unacceptable for use in dc-dc converters. Inverters using transmission-line networks or high-order lumped networks simulating transmission lines have been developed that both reduce device voltage stress and provide switched-mode operation (typically using switch duty ratios less than 50%). However, these use large or complicated distributed structures or many lumped elements, often limiting their utility.
A further drawback of most class-E- and class-F-based designs is the size and energy storage of the RF input choke, which limits the miniaturization and transient performance. The “second harmonic” class-E inverter replaces this choke with a small resonant inductor, but still suffers the voltage stress limitations described above. It would thus be desirable to have a resonant “soft-switched” converter with low device voltage stress and small component count and size while maintaining rapid transient response.